EEE 51 Tutorial 7

Differential Amplifiers

Differential amplifiers gives us, among other things, (1) the capability to reject common-mode signals, (2) increased signal swing, and (3) a wide common-mode input range, making it easier to cascade amplifiers. However, this comes at a price: a (more than) doubling of the number of (1) circuit elements and (2) power consumption.

Figure 1 shows the basic differential amplifier, composed of (1) the emitter-coupled pair, Q1 and Q2, (2) the tail current source, Q3, and (3) the load resistors $R_{La}=R_{Lb}=R_L$ .

Figure 1: The basic differential amplifier.

Biasing the Differential Amplifier

Once again, let us (arbitrarily) set the DC collector currents of transistors Q1 and Q2 to 1mA. Thus, the tail current source, and hence $I_{C3}$ , should be equal to 2mA.

We know that $V_x$ follows the common-mode input, and that the minimum $V_x$ should be large enough to keep Q3 in the forward-active region:

$V_{x,\min}=V_{ic,\min}-V_{BE1}>V_{CE3,sat}$

Let us set $V_{x,\min}=0.5\mathrm{V}$ to leave some margin that we could potentially exploit later. From $V_{x,\min}$ , we can calculate $V_{ic,\min}$ :

$V_{ic,\min}=V_{x,\min}+V_{BE1}\approx 1.2\mathrm{V}$

From $V_{x}$ , we can also calculate the minimum output swing of the positive output, $V_{op,\min}$ :

$V_{op,\min}=V_{x}+V_{CE1,sat}=V_{ic}-V_{BE1}+V_{CE1,sat}$

Note that if we use $V_{x,\min}$ in the equation above, we will not get any leeway in choosing the input common-mode, which is synonymous to the DC voltage at the input of the differential amplifier. If we choose $V_{op,\min}=2\mathrm{V}$ , then we can calculate the maximum input common-mode voltage:

$V_{ic,\max}=V_{op,\min}+V_{BE1}-V_{CE1,sat}\approx 2.5\mathrm{V}$

This gives us a relatively large common-mode input range (CMIR):

$\mathrm{CMIR}=V_{ic,\max}-V_{ic,\min}\approx 1.3\mathrm{V}$

Note that $V_{x,\max}=V_{ic,\max}-V_{BE1}\approx 1.8\mathrm{V}$ . Therefore, for a $V_{CC}=5\mathrm{V}$ , the output swing of $V_{op}$ (and $V_{on}$ as well) is

$V_{op,swing}=V_{op,\max}-V_{op,\min}=V_{CC}-2\mathrm{V}=3\mathrm{V}$

If we want to bias the output at the middle of this range, i.e. when $I_{C1}=1\mathrm{mA}$$ (the quiescent collector current of Q1), we need a load resistance of

$R_L = \frac{\tfrac{1}{2}\cdot V_{op,swing}}{I_{C1}} =1.5\mathrm{k \Omega}$

To bias our tail current source transistor, Q3, we once again use our procedure in tutorial 5, with $I_{C3}=I_{C1} + I_{C2}=2\mathrm{mA}\approx I_{C4}$ , and choosing $V_{CE3}=V_x$ to be at the midpoint of $V_{x,\max}$ and $V_{x,\min}$ . Thus, with $V_{CE3}=1.15\mathrm{V}$ , we get

$R_m=2.122\mathrm{k \Omega}$

Small Signal Gain

Recall that for the differential amplifier in Figure 1, the differential mode gain, $A_{dm}$ , is given by

$A_{dm}=\frac{v_{od}}{v_{id}}=-g_{m1}\cdot \left(r_{o1} \| R_{L}\right)$

And the common-mode gain, $A_{cm}$ , is given by

$A_{cm}=\frac{v_{oc}}{v_{ic}}=-\frac{g_{m1}\cdot \left(r_{o1} \| R_{L}\right)}{1 + 2\cdot g_{m1}\cdot R_{tail}}$

To achieve a reasonable amount of common-mode rejection, we want $R_{tail}\gg 1$ . One convenient way to increase the output resistance of the tail current source is to degenerate the current mirror using $R_e=R_{e3}=R_{e4}$ , as seen in Figure 2.

Figure 2: A differential amplifier with a degenerated tail current source.

The output resistance of the degenerated current mirror in Figure 2 can then be calculated (from its small signal model) as

$R_{tail} \approx R_{e3} \cdot \left(1 + g_{m3}\cdot r_{o3}}\right)$

This increased output resistance comes as a cost, an increase in the minimum required voltage across the current source:

$V_{x,\min}=V_{CE3,sat} + I_{C3}\cdot R_{e3}$

Since we added a margin of 300mV to $V_x$ earlier, for $I_{C3}=2\mathrm{mA}$ , we can accommodate, at most, a degeneration resistance of $R_{e,\max}=150\mathrm{\Omega}$ . Note that you have to maintain the same bias current, you have to subtract the voltage across $R_{e4}$ when computing for $R_m$ .

Simulating the Differential Amplifier

Let’s use simulate our differential amplifier using this netlist, with current sources using degeneration resistances, $R_e$ , and using this Python script to examine our results. Note the use of voltage-controlled voltage sources to generate $V_{ip}$ and $V_{in}$ from $V_{id}$ and $V_{ic}$ .

Looking at our tail current source, let’s plot the tail current as we vary the input common mode:

Figure 3: The tail current behavior as the input common-mode is varied, for different emitter degeneration resistances.

Notice that without degeneration, $R_{tail}$ is relatively small, resulting in a large tail current variation as we change $V_{ic}$ . Also note the larger $V_{ic,\min}$ values as we increase $R_e$ .

Let’s use $R_e=100\mathrm{\Omega}$ in our succeeding simulations to keep the tail current as flat as possible over the CMIR without sacrificing our output swing.

Figure 4 shows the behavior of the output nodes and $V_{x}$ as we vary $V_{id}$ , for a $V_{ic}$ of 1.2V, 1.8V, and 2.4V. The behavior of the currents, on the other hand, are shown in Figure 5.

Figure 4: The The differential amplifier output nodes and $V_{x}$ as we vary $V_{id}$ , for a different values of $V_{ic}$ .

Figure 5: The differential amplifier currents as we vary $V_{id}$ , for a different values of $V_{ic}$ .

Looking at the behavior of $V_x$ in Figure 4, we see that it is relatively constant as $V_{id}$ is varied, hence, it can be considered a “virtual ground” in small-signal analysis. We can also see that even for $V_{ic}=2.4\mathrm{V}$ , $V_{op,\min}$ (and $V_{on,\min}$ ) is still greater than $V_x$ by at least a $V_{CE1,sat}$ , keeping Q1 (and Q2) in the forward-active region at all times.

Figure 6 shows the differential transfer characteristics of the amplifier, where $V_{od}=V_{op}-V_{on}$ . Note that the common-mode voltage has very little effect on the transfer characteristics, and that the differential output swing is twice that of the single-ended outputs.

Figure 6: The differential transfer characteristics of the differential amplifier.

Taking the derivative of the transfer curves in Figure 6, we get the differential mode gain plots in Figure 7.

We can see that the simulated differential mode gain agrees with the gain obtained using half-circuit analysis.

Figure 8 shows the differential transient response of the amplifier, and note that (1) the differential output is zero when the differential input is zero, and (2) the swing is bipolar, i.e. goes from +1.2V to -1.2V, and can potentially be larger than the supply voltage.

Figure 8: The differential-mode transient response.

End of Tutorial 7

Congratulations! You have just biased a differential amplifier, increased the output resistance of its tail current, and simulated the effects of the differential- and common-mode inputs on the behavior of key differential amplifier voltages and currents.