CoE 111: Advanced Digital Design (1st sem AY 2017-2018)

Class Information

Announcements

  • (12/28) Tentative grades are up here. Feel free to e-mail me for any queries. You can also e-mail me for your checked exam papers. I plan to upload the grades by Sunday 5PM.
  • (12/27) Exam 2 results are up here. Offices are closed, so if you want to claim your paper, you may e-mail me and I can just meet you physically outside of EEE. If you are unable to go to EEE, you can e-mail me to ask for photos of your exam. I will post the exam questionnaire and solution by tonight.
  • (12/18) Exam 1 results are up here. You may claim your papers at room 409 or room 429.
  • (12/14) Bonus points for slave operation have been added (shown in below). Deadline for e-mail submission is on 19 Dec 2017, Tuesday 6PM.
  • (12/13) Final checking schedule for MP can be found here. Students who did not answer the survey can only have their MP’s checked on the earliest schedule, which is on 14 Dec 2017, Thursday, 9AM-12PM.
  • (12/11) Due to scheduling constraints and to give you more time to work on the machine problem, I have decided to extend the deadline. Please answer the following survey for your preferred schedule. Each schedule has limited slots, thus slots will be assigned on a first-come-first-serve basis. Deadline for answering the survey is on 12 Dec 2017, 11:59PM. I will post the final schedule assignments by 13 Dec 2017. In each schedule, a sign-up sheet for exact checking time will be given at the start of the session and will also be first-come-first-serve.EMIL (429) will be open from Mon to Wed from 9AM-5PM, just look for me at room 409 so I can open the lab for you. Limited use will be allowed from Thurs onwards to give priority to those who have their checking schedule on the said dates.
  • (12/9) Please set the module name of the I2C controller to “controller” for the machine problem. Also, table 1 has an erratum. The last row should read SDA_tris (not SCL_tris), and this signal gives the controller control of the SDA bus.
  • (12/4) There will be an open lab session today from 10:30am to 5pm. If the room isn’t open yet, just look for me at room 409 so I can open it for you.
  • (11/20) Late exam for Exam 2 is on 21 Nov 2017 (Tuesday), 6pm-8pm, venue to be announced. Just proceed to room 409 on the said schedule and wait for further instructions.
  • (11/10) Exam 2 moved to 18 Nov 2017 (Saturday), 10am-12pm at LC2. Please e-mail me for any possible conflicts you might have so we can arrange an early/late exam if needed.
  • (11/10) Lab 6 deadline for Friday class moved to tomorrow (11 Nov), 11:59pm. Room 429 will also be open tomorrow from 9:30am-12:30pm so that you can work on your submission.
  • (9/29) Exam 1 questions and solution already posted.
  • (9/20) License server has been moved to 10.158.16.12. Please change your Synopsys setup scripts accordingly. In light of this and the (possible) suspension of classes tomorrow, deadline for lab exercise 4 (for Wednesday and Thursday lab classes) is moved to Monday, 25 Sept 2017, 11:59pm. We can have an open lab session on the same date as well, from 9am-5pm.
  • (9/20) First exam moved to 29 Sept 2017. Please submit your A4 answer sheets to my pigeonhole at the EEEI admin.
  • (9/13) First exam postponed. New schedule will be announced at least 1 week before the exam.
  • (8/14) Welcome to CoE 111!

Lecture Slides

Lab Resources

EDA tools environment variables

Create a BASH script file (ex. setup_synopsys.sh) with the following contents. Whenever you need to run the EDA tools, just run this script before running the tools (ex. source setup_synopsys.sh).

#!/bin/bash
## License
export LM_LICENSE_FILE=27000@10.158.16.12
## VCS
export VCS_HOME=/usr/synopsys/vcs/I-2014.03/
export VCS_BIN=/usr/synopsys/vcs/I-2014.03/bin
## SYN
export SYN_BIN=/usr/synopsys/syn/I-2013.12/bin
## PATH
export PATH=$VCS_BIN:$SYN_BIN:$PATH

Lab Exercises