Class Information

• Instructors:
  • Adelson Chua
  • Sherry Joy Alvionne S. Baquiran
• Lecture: WFX WF 2:30-3:30pm EEEI 120
• Lab:
  • WFXTRU: Tuesday 8:30-11:30am EEEI 301/EEEI 428
  • WFXTXY: Tuesday 2:30-5:30pm EEEI 301/EEEI 308
  • WFXHXY: Thursday 2:30-5:30pm EEEI 301/EEEI 308
  • WFXSCDE: Saturday 9-12nn EEEI 301/EEEI 308

Announcements

• Hello!
• We’re on Piazza! Join the discussions here: piazza.com/upd.edu.ph/fall2015/coe23. Discuss quiz answers, ask lecture related questions, clarify lab exercise specifications here.
• Until the laptops become available in Room 301, lab sessions will be held in EPIL (428) and STC (308). Check the corresponding rooms above.
• Lab 0 (Introduction to HADES) will not be graded. It will serve as a practice in using the tool in preparation for the succeeding lab exercises.
• Lab 2 (Incompletely Specified Machines) is a take-home lab. Checking will be on the week of September 8, 2015.
• Design Problem 1 (Digital System Design) is to be accomplished within two weeks. Presentation of working implementation, as well as a printed documentation, will be ‘anytime’ within the week of September 28, 2015.
• Design Problem 1 deadline is extended for 1 week. You can have your work checked without any deductions until Saturday, October 10, 2015. Note that Lab 4 will be done on the week of October 5, 2015. All DP checking will be done off class hours. After that period, late submissions are still allowed with 10% deductions every week late.
• Design Problem 1 deadliest deadline would be on the November 7, 2015. At this point, the maximum grade that you can get for DP1 is 60%. Beyond this date, all subsequent DP1 submissions will not be credited anymore (zero grade for DP1).
• To those who have not yet finished Lab 6. You can do so during the week of November 2, 2015. You will be required to finish the implementation up to the 2-bit gray code circuit.
• Design Problem 2 (Digital System Implementation) deadline will be on the finals week (1st week of December). All groups are required to meet the 60% requirement (see the grade breakdown) or else a grade of INC will be incurred.
• Integrated circuits will be provided by EEEI. It will be distributed among the groups by the 1st-2nd week of November. All other stuff (breadboards, switches, LEDs) can be borrowed from EEEI (but with limited supply) or bought from electronics shops.

Lecture Slides

• Lecture 0: Course Overview
• Lecture 1: Review of Synchronous Sequential Circuits
• Lecture 2: Incompletely Specified Circuits
• Lecture 3: One-hot Encoding
• Lecture 4: Standard Sequential Modules: Registers
• Lecture 5: Standard Sequential Modules: Counters
• Lecture 6: Circuit Non-idealities: Combinational Delays
• Lecture 7: Circuit Non-idealities: Sequential Circuits
• Lecture 8: Asynchronous Sequential Circuits: Analysis
• Lecture 9: Asynchronous Sequential Circuits: Synthesis
• Lecture 10: Asynchronous Sequential Circuits: Hazards
• Lecture 11: Asynchronous Sequential Circuits: State Reduction
• Lecture 12: Asynchronous Sequential Circuits: State Assignment
• Lecture X: Sequential Timing Review: The Long Lost Lecture

Lab Exercises

• HADES
• For Unix, run HADES by executing the command: ‘java -jar hades.jar’, from a terminal on the directory where hades.jar is located. For Windows, as long as Java is installed, you can just double click the JAR file.
• Lab Session 0: Introduction to HADES
• Lab Session 1: Synthesis of Synchronous Sequential Circuits
• Lab Session 1 (Challenge): High-level Synthesis of Sequential Circuits
• Lab Session 2: Incompletely Specified Machines
• Lab Session 3: One-hot Encoding
• Design Problem 1: Digital System Design: Sequential Divider
• Lab Session 4: Circuit Non-idealities
• Lab Session 5: Asynchronous Sequential Circuits
• Lab Session 6: Discrete Digital Circuits
• Design Problem 2: Digital System Implementation: Sequential Divider