Class Information
- Instructors:
- Adelson Chua
- Sherry Joy Alvionne S. Baquiran
- Lecture: WFX WF 2:30-3:30pm EEEI VLC
- Lab:
- WFXTRU1: Tuesday 8:30-11:30am EEEI 301
- WFXTXY: Tuesday 2:30-5:30pm EEEI 305
- WFXHRU1: Thursday 8:30-11:30am EEEI 301
- WFXHRU2: Thursday 8:30-11:30am EEEI 305
- WFXHXY: Thursday 2:30-5:30pm EEEI 305
Announcements
- Hello!
- We’re on Piazza! Join the discussions here: piazza.com/upd.edu.ph/fall2016/coe23. Discuss quiz answers, ask lecture related questions, clarify lab exercise specifications here.
- Laptops will be provided for lab exercises. However, you can opt to bring your own laptop if you want. Institute laptops will each have their own mouse when Lab Session 1 starts.
- Lab Session 0 will not be recorded. It’s just there for tool (HADES) familiarization.
- Lab Session X will not be recorded as well. However, it prepares you for the Design Problem implementation.
- Design Problem 1 released. Deadline will be on the first week of October.
Lecture Slides
- Lecture 0: Course Overview
- Lecture 1: Review of Synchronous Sequential Circuits
- Lecture 2: State Reduction: Incompletely Specified Machines
- Lecture 3: One-hot Encoding
- Lecture 4: Standard Sequential Modules: Registers
- Lecture 5: Standard Sequential Modules: Counters
- Lecture 6: Circuit Non-idealities: Combinational Delays
- Lecture 7: Circuit Non-idealities: Sequential Circuits
- Lecture 8: Asynchronous Sequential Circuits: Analysis
- Lecture 9: Asynchronous Sequential Circuits: Hazards
- Lecture 10: Asynchronous Sequential Circuits: Synthesis
- Lecture 11: Asynchronous Sequential Circuits: State Reduction
- Lecture 12: Asynchronous Sequential Circuits: State Assignment
Lab Exercises
- HADES
- For Unix, run HADES by executing the command: ‘java -jar hades.jar’, from a terminal on the directory where hades.jar is located.
- For Windows, as long as Java is installed, you can just double click the JAR file.
- Lab Session 0: Introduction to HADES
- Lab Session 1: Synthesis of Synchronous Sequential Circuits
- Lab Session 2: Incompletely Specified Machines
- Lab Session 3: One-hot Encoding
- Lab Session X (Challenge): High-level Synthesis of Sequential Circuits
- Design Problem 1: Digital System Design: Signed Sequential Multiplier
- Lab Session 4: Circuit Non-idealities
- Lab Session 5: Asynchronous Sequential Circuits
- Lab Session 6: Discrete Digital Circuits
- Design Problem 2: Ninja Trainer