• Introduction to Semiconductor Devices and Circuits
  • Lecture Schedules:
    • Tuesdays and Thursdays
      • THA: 7am – 8am, LC1
      • THI: 1pm – 2pm
    • Wednesdays and Fridays
      • WFI: 1pm – 2pm

Announcements

  • 6/6: Welcome to EEE 41!
  • 8/8: First Exam time is moved to 1pm – 4pm. Inform your instructors ASAP if you have a conflict.
  • 8/16: Early first exam schedule is 10:30am – 1:30am. Only those who have informed their instructors will be allowed to take the early exam.
  • 8/16: Early first exam venue is EEEI room 307.
  • 8/27: THA students: Please take this survey for the make-up class schedule before 5pm on Thursday, 8/29.
  • 8/29: THA students: Please take this new survey before 12pm on 8/30 (the old survey results have been deleted). The final schedule will be posted here by 5pm on 8/30.
  • 8/30: We will have our make-up class on Saturday, 9/14 from 9am to 12pm. This time and date has been selected based on the results of the online class survey.
  • 9/13: Our make-up class on 9/14 (Saturday) will be held at the Meralco MMLH (LC1), from 9am to 12pm.
  • 10/8: Problem set available here. Use A4 sheets of paper for your answers. This problem set is graded. Deadline for submission will be on Oct 11, 2013, 12 noon. Solutions to the problems will be released afterwards.
  • 10/9: First Exam Solutions
  • 10/9: Problem set corrections: Problem 3.1 and 3.2. ND = 1.0 x 10^17 instead of 2 x 10^17. It is a P-type material.
  • 10/11: Problem Set Solutions
  • 10/12: Final exam postponed to Monday, October 14. Time is TBA. Check back later for the exam schedule.
  • 10/13: Final exam schedule: Monday, 10/14, 9am-12nn (VLC, LC2). Early exam: 7:30am-10:30am (Rm 307).
  • 10/22: Final grades can be viewed here. If you wish to see a more detailed breakdown of your grades or if there are errors in the spreadsheet, please contact your DC instructor

Exam Dates

  • First Exam: Saturday, August 17, 2013, 1pm – 4pm (coverage is up to diode non-idealities)
  • Final Exam: Saturday, October 12, 2013, 9am – 12pm

Class Lectures

DateTitleSlides
16/6Introductionpdf
Semiconductor Fundamentals (3 weeks)
26/11Semiconductor materials; Si structure; Electrons and holespdf
36/13Energy-band model; Band-gap energy; Density of states; Dopingpdf
6/18No Class (UP Foundation Day) for THA
46/20Thermal equilibrium; Carrier distributions and Concentrations; Determination of the Fermi Energypdf
6/25No Class for THA
6/27No Class for THA
57/2Carrier properties and drift; Carrier scattering; Drift current; Resistivitypdf
67/4Carrier diffusion; Diffusion current; Generation and recombinationpdf
77/9Minority carrier lifetime; Continuity equations; Minority carrier diffusion; Quasi-Fermi levelspdf pdf
Metal-Semiconductor Contacts (1 week)
87/11Work function; metal-semiconductor band diagram; depletion widthpdf
97/16I-V characteristics; Practical ohmic contacts; small-signal capacitance pdf
PN Junction Diodes (3 weeks)
107/18Electrostaticspdf
117/23I-V characteristicspdf
127/25Reverse-bias current; reverse-bias breakdownpdf
137/30Deviations from the ideal: R-G current, series resistance, high-level injection; narrow-base diodepdf
148/1Charge control model; Small-signal model; transient response: turn-off pdf
158/6Transient response: turn-on; diode applicationspdf
168/8Review
Bipolar Junction Transistors (3 weeks)
178/13Introduction; BJT fundamentalspdf
188/15Ideal transistor analysis; Ebers-Moll modelpdf
198/20Deviations from the ideal; Gummel plot; Modern BJT structures pdf
208/22Charge control model; base transit time; Small signal modelpdf
218/27Cutoff frequency; transient responsepdf
228/29PNPN devices Reading assignment
(Ch 13)
Metal Oxide Semiconductor (MOS) Capacitors (1 week)
239/3MOS Structure; energy band diagram; Electrostaticspdf
249/5Capacitance vs. voltage characteristicpdf
Metal Oxide Semiconductor (MOS) Field-Effect Transistors (FETs) (3 weeks)
259/10MOSFET structure and operation; Qualitative theory; long-channel I-V characteristics pdf
269/12 Modified long-channel I-V characteristics; Body effect parameter; PMOS I-V; small-signal modelpdf
279/17 Body effect parameter; PMOS I-V; small-signal model
289/19Sub-threshold leakage current; gate-length scaling; Velocity saturation
299/24Short-channel effect; source/drain structure; drain-induced barrier lowering; excess current effects
309/26IC technology; MOSFET fabrication process; CMOS latch-up
3110/1Review
3210/3Review

Discussion Class Slides and Homeworks

TitleDue Date
DC 1: Review Questions
DC 2: Semiconductor Fundamentals
DC 3: Fermi Level and Carrier Concentrations
DC 4: Carrier Concentrations and Resistivity
DC 5: Band Bending and Minority Carrier Concentration
DC 6: MS Junctions
DC 7: MS Junctions 2
DC 8 : PN Junction Electrostatics
DC 9: PN Junction I-V Characteristics
DC 10: PN Junction Small Signal and Transient Response
DC 11: Ideal BJT Static Characteristics
DC 12: Deviations from the Ideal BJT
DC 13: Ideal BJT Deviation (Cont) and CCM
DC 14: MOS Capacitors
DC 15: MOSFETs

Textbook

  • Semiconductor Device Fundamentals by R. F. Pierret (Addison Wesley, 1996)

References

  1. Solid State Electronic Devices by B. G. Streetman & S. Banerjee (Prentice Hall, 2000)
  2. Fundamentals of Modern VLSI Devices by Y. Taur & T. H. Ning (Cambridge University Press, 1998)
  3. Semiconductor Devices by K. Kano (Prentice Hall, 1998)
  4. Introduction to Semiconductor Devices and Circuits, 2nd ed., by L. Sison (U.P. Press, 2008)