• Electronic Circuits I
  • Lecture Schedules:
    • THQ (TH 7:00am – 8:30am) Room: 101 (new building)
    • THW (TH 1:00pm – 2:30pm) Room: LC2

 Announcements

  • 11/7: Welcome to EEE 51!
  • 11/7: THQ room assignments will be finalized soon. In the meantime, please check this site often.
  • 11/7: No class on Tuesday, 11/12.
  • 1/15: No class on Thursday, 1/16 (ACLE).
  • 2/18: Hi all, starting with HW8, all homework papers could only be considered for rechecking 2weeks after the checked papers have been returned. For HW1 to HW7, rechecking of papers is valid until March 7 only. This is implemented to avoid rechecking of all homeworks at the end of the semester, as well as for you to claim your checked papers at the EEEI Admin. Please disseminate. Thank you.
  • 4/10: Class standings are here.
    • For questions regarding the exam grading, put your specific questions in writing on a sheet of paper, attach it to the exam, and drop both off at room 409. I will only entertain questions in this way (until 4pm, Monday, 4/14).
      • Note: for the midterm exam and final exam, the problems have equal weight (25% of the total score)
    • Graduating students: If you have any questions, email me as soon as possible.
    • Regarding rechecking of homeworks 9-14, put your specific questions in writing on a sheet of paper, attach it to the HW paper, and drop both off at room 407. We will only entertain questions in this way (until 4pm, Monday, 4/14). Pinpoint which questions for which you think you deserve additional points and defend your answer for those questions.
  • 4/14: Updated scores of rechecked homeworks are now viewable here.
  • 4/16: The class standings page has been updated to reflect the results of the regrading requests.

Exam Schedules

  • Midterm: Saturday, 2/1, 9am-12nn
    • Coverage: Up to frequency response of multi-stage amplifiers
    • Exam 1 solutions (problem 1: p1, p2; problem 2: p1, p2, p3)
    • Exam 1 solutions (problems 3 and 4)
  • Finals: Tuesday, 4/1, 9am-12nn
    • Coverage: Comprehensive

Past Exams

Homeworks

HW #DeadlineLinkSolutionNotes
15pm Friday, November 29, 2013pdfsolutionEEE 51 HW scores

You may now claim your HW1 papers in Admin Office New Building.
25pm Friday, December 6, 2013pdfsolution (Corrected 2013 Dec 12)Updated HW 2 scores. Check link in first HW.
35pm Friday, December 13, 2013pdf
solutionChecked HW3 papers are now available in the EEEI admin.

Updated HW 3 scores. Check link of first HW. (1-27-14)

Use Rs = 50 ohms for #1
45pm Friday, January 10, 2014pdf
solutionGrades for HW4 are now uploaded. Check the GoogleDoc link at the HW1 row.

Checked HW4 papers are now available in the EEEI admin.
55pm Friday, January 17, 2014pdfsolutionAdded labels for the output voltage

02/18
EEE 51 HW scores

You may now claim your HW5 papers in EEEI Admin
65pm Friday, January 24, 2014pdfsolution
Updated: Feb. 21, 2014
You may now claim your HW6 papers in EEEI Admin
75pm Monday, February 3, 2014pdf_v2solutionFor Prob1, assume equal collector currents

For Prob2, assume that the pole(s)/zero(s) are spaced far apart

02/18
EEE 51 HW scores

You may now claim your HW1 papers in EEEI Admin
8No deadlineProblem Set 1 pdfsolution_complete
Correction for Part II: Vx and Vy are connected to R3 and R2 respectively.
(File is already updated)

Practice Problem Set 1
95pm Friday, February 14, 2014pdfSolution
105pm Friday, February 21, 2014pdfsolutionPartial solutions uploaded
115pm Friday, February 28, 2014pdf
125pm Friday, March 7, 2014pdfpdfm3, m4, m5 are PMOS
m1, m2, m6 are NMOS
135pm Friday, March 14, 2014pdfpdf
145pm Friday, March 21, 2014pdfpdf
15No deadlinepdf PART1

PART2_partial

PART3
Addendum:
For problem 1, lambda,n=lambda,p=0.05V^-1. (Used for ro)
For problem 1, q5. CIN=Cgs1+Cs. Doesn't really affect the final answer.

For problem 3, C1 is capacitive, not C2.

Class Lectures

DateTitleSlides
111/7Introduction
211/12No Class
311/14BJT Models; Transistor Biasingpdf
411/19Transistor Biasingpdf
511/21MOSFET Modelspdf
611/26Single Transistor Amplifiers; Two-Port Equivalent Networkspdf
711/28Current Sources and Current Mirrorspdf
812/3Differential Circuitspdf
912/5The BJT Differential Pair
1012/10MOSFET Differential Amplifierspdf
1112/12Cascaded Amplifierspdf
1212/17Cascaded Amplifiers
Christmas Break
131/7Operational Amplifierspdf
141/9Transistor Capacitances; Frequency Effectspdf
151/14High-Frequency Analysis of Single Transistor Amplifierspdf
161/16No Class (ACLE)
171/21High-Frequency Analysis of Single Transistor Amplifierspdf
181/23High-Frequency Analysis of Multi-Stage Amplifiers
191/28Review
End of Midterm Exam Coverage
201/30Review of Feedback Concepts; Ideal Feedback Circuitspdf
212/4Analysis of Feedback Amplifiers pdf
222/6Analysis of Feedback Amplifiers pdf
232/11No Class
242/13No Class
252/18Analysis of Feedback Amplifiers pdf
262/20Stability of Feedback Amplifierspdf
272/25No Class (EDSA Day)
282/27Stability of Feedback Amplifiers
298/29Step Response of Feedback Amplifiers
303/4Step Response of Feedback Amplifiers
313/6Introduction to Oscillatorspdf
323/11Sinusoidal Oscillatorspdf
333/13Sinusoidal Oscillators
343/18Introduction to Translinear Circuitspdf
353/20Summarypdf

Additional References

  • Gray, Hurst, Lewis and Mayer. Analysis and Design of Analog Integrated Circuits, 4th ed. ©2000. Wiley.
  • Boylestad and Nashelsky. Electronics Devices and Circuit Theory, 8th ed. ©2002. Prentice-Hall, NJ.
  • Savant, Roden, and Carpenter. Electronic Design. ©1991. Benjamin/Cummings Publishing Co.
  • Chirlian. Analysis and Design of Integrated Electronic Circuits. ©1986. Addison-Wesley.
  • Millman and Grabel. Microelectronics. ©1987. Mc-Graw Hill.